We are looking for a skilled design engineers to architect and oversee interfacing our low-speed interfaces to our high-speed interconnect.
These blocks include Boot logic, Serial Interfaces, and debug logic.
Responsibilities:
- Working with a small team to implement, debug, and verify Prodigy's internal and external buses.
- Building the infrastructure needed to bringup and debug the various components in FPGAs and silicon.
- Working with the software team to create and verify drivers and models needed.
Qualifications:
- Requires 8-15 years of applicable experience (bright individuals with fewer years experience would be considered).
- Experience with integration and debug of APB, AHB, and AXI interconnects.
- Development of internal logic analyzers and profilers.
- Must have Verilog / SystemVerilog / Synthesis / STA / Lint experience.
Benefits:
- Competitive salary and benefits package.
- Opportunities for professional development and advancement.
- International environment and further career progression.
- Getting in touch with bleeding edge technology.
- Flexible working hours.
- Work-life balance.
- Collaborative and supportive work environment.
If you meet the qualifications and are interested in this opportunity, please submit your resume and cover letter. We look forward to hearing from you!